1. Field of the Invention
This invention relates to sampling-rate conversion (SRC), and particularly to methods of performing SRC for multiple input channels.
2. Description of the Related Art
Sampling-rate conversion (SRC) is the process of converting a discrete-time signal x[n] sampled at a rate FSin to another signal y[m] sampled at a rate FSout. “Synchronous” SRC occurs when a single master clock in the system generates the input and output sample clocks; asynchronous SRC occurs when there are separate clocks on the input and output.
Audio applications requiring SRC were once restricted to high-end mixing consoles and post-production systems. However, with the advent of streaming audio, networked audio players, and compressed audio, SRC is being incorporated into a variety of consumer products. SRC can be done in either hardware or software. Hardware implementations may be stand-alone IC's, such as the Analog Devices AD1896, or peripherals integrated into audio-specific digital signal processors (DSPs), such as the Analog Devices ADSP-21364. Alternatively, software implementations are attractive when the audio system already contains a DSP with spare resources, or if the SRC occurs between two software modules such as an audio decoder and effects processing.
An illustration of the process is shown in FIG. 1. An input signal x[n] is converted with a digital-to-analog converter (D/A) 10 to a continuous-time signal x(t) at a rate FSin, filtered by a filter 12 which implements a function H(S) to produce a continuous-time signal y(t), and then sampled with an analog-to-digital (A/D) converter 14 at a sampling-rate FSout to give the output y[m]. The function H(S) implements a low-pass filter which eliminates any frequency components which cannot be represented at the new sampling rate. The design challenge is to implement a discrete-time simulation of this process both accurately and efficiently.
It has been determined that this design is theoretically equivalent to the implementation of a time-varying discrete-time filter, whose time-varying kernel is h(n−mTin) and which is evaluated at a sampling period of Tout (where Tin=1/FSin, and Tout=1/FSout). In other words, the ideal time-varying filter has a kernel consisting of samples of the ideal continuous-time filter, spaced according to the sampling-rates, and offset according to the instantaneous “phase” of the converter. The major differences between most SRC techniques tend to be in the ways that they implement the time-varying filter and/or how they update the filter coefficients in order to be as efficient as possible.
A good background for the SRC problem is found in Crochiere and Rabiner, Multirate Digital Signal Processing, Prentice-Hall, Inc., 1983, pp. 39-42, which describes the “classical” rational-ratio design of implementing the ratio L/M as an upsampling by a factor of L followed by appropriate filtering, followed by a downsampling by a factor of M. This method tends to be useful for small values of L and M; otherwise, the intermediate sampling-rate tends to get unwieldy. It is, however, often used as the starting point for other design derivations.
Several methods are described in T. A. Ramstad, Digital Methods for Conversion Between Arbitrary Sampling Frequencies, IEEE Transactions on Acoustics, Speech, and Signal Processing, Vol. ASSP-32, No. 3, June 1984, which employ both finite impulse response (FIR) and infinite impulse response (IIR) filters. A straightforward implementation of the h(n−mTin) filter is first presented, where a rational ratio is assumed, and thus the coefficients of the runtime filter are simply a periodic visiting of elements of a precomputed array containing the required samples of h(t). While in essence a synchronous technique, it can be extended to asynchronous usage, at the penalty of needing a very large array to reduce artifacts due to not interpolating the coefficients. Further variations include implementing an integer-ratio upsampler followed by a low-order polynomial interpolator.
A design for h(t) based on the windowed sinc function is presented in Smith and Gosset, A Flexible Sampling-Rate Conversion Method, ICASSP-84, Volume II, pp. 19.4.1-19.4.2. New York, IEEE Press (March, 1984). Here, an asynchronous conversion method computes runtime FIR coefficients for the variable filter via linear interpolation from a precomputed table. The method is designed to be used for a wide range of conversion ratios with a single table, which requires that the FIR coefficient generation handle a particularly general case. The Analog Devices AD1896 hardware sample-rate converter implements a similar concept to the Smith-Gosset design, but with higher-order interpolation of the table lookups to keep the table size down.
A paper by Russell and Beckmann, Efficient Arbitrary Sampling-rate Conversion With Recursive Calculation of Coefficients, IEEE Transactions on Acoustics, Speech, and Signal Processing, Vol. 50, No. 4, April 2002, presents an innovative IIR-based technique which computes IIR filter coefficients recursively on the fly and can thus be very efficient. However, being an IIR technique, it cannot implement linear phase designs.
A different approach to the basic problem is presented in C. W. Farrow, A Continuously Variable Digital Delay Element, Proc. 1988 IEEE In. Symp. Circuits Syst. (Espoo, Finland), pp. 2641-2645, June 1988, and is enhanced in a series a papers, notably Vesma and Saramäki, Design and Properties of Polynomial-Based Fractional Delay Filters, ISCAS 2000—IEEE Int. Symp. on Circuits and Systems, pp. I-104-107, May 2000. In this case, the h(t) filtering and the interpolation are transposed, such that instead of implementing an interpolation between a number of oversampled samples (or sub-sample-delay filters), the coefficients of the interpolation itself are filters. In this situation, the design of the interpolators and the filters are combined into a single design, and the time-variation is limited to a single parameter, leaving the filters to be time-invariant. This technique is still being developed, however, and it appears that most of the development has been done with low-order filters. A method for designing the filters in terms of h(t) has been recently shown in J. Vesma, A Frequency-Domain Approach to Polynomial-Based Interpolation and the Farrow Structure, IEEE Transaction on Circuits and Systems—II: Analog and Digital Signal Processing, Vol. 47, No. 3, March 2000, such that it is not yet clear how designs based on this method compare to designs following the above tracks, either from an efficiency standpoint or from a distortion performance standpoint.
Almost all existing techniques either do not or cannot separate the variation in the time-varying filter's design from the running of the filter. As such, most methods end up having to replicate large portions of the algorithm (if not the whole algorithm) across channels when converting multi-channel signals (where all the channels are sampled synchronously).